cpu.c (7653B)
1 // Copyright 2011 Google Inc. All Rights Reserved. 2 // 3 // Use of this source code is governed by a BSD-style license 4 // that can be found in the COPYING file in the root of the source 5 // tree. An additional intellectual property rights grant can be found 6 // in the file PATENTS. All contributing project authors may 7 // be found in the AUTHORS file in the root of the source tree. 8 // ----------------------------------------------------------------------------- 9 // 10 // CPU detection 11 // 12 // Author: Christian Duvivier (cduvivier@google.com) 13 14 #include "src/dsp/cpu.h" 15 16 #if defined(WEBP_HAVE_NEON_RTCD) 17 #include <stdio.h> 18 #include <string.h> 19 #endif 20 21 #if defined(WEBP_ANDROID_NEON) 22 #include <cpu-features.h> 23 #endif 24 25 #include <stddef.h> 26 27 #include "src/webp/types.h" 28 29 //------------------------------------------------------------------------------ 30 // SSE2 detection. 31 // 32 33 // apple/darwin gcc-4.0.1 defines __PIC__, but not __pic__ with -fPIC. 34 #if (defined(__pic__) || defined(__PIC__)) && defined(__i386__) 35 static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) { 36 __asm__ volatile ( 37 "mov %%ebx, %%edi\n" 38 "cpuid\n" 39 "xchg %%edi, %%ebx\n" 40 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) 41 : "a"(info_type), "c"(0)); 42 } 43 #elif defined(__i386__) || defined(__x86_64__) 44 static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) { 45 __asm__ volatile ( 46 "cpuid\n" 47 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) 48 : "a"(info_type), "c"(0)); 49 } 50 #elif defined(_MSC_VER) && (defined(_M_X64) || defined(_M_IX86)) 51 52 #if defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 150030729 // >= VS2008 SP1 53 #include <intrin.h> 54 #define GetCPUInfo(info, type) __cpuidex(info, type, 0) // set ecx=0 55 #define WEBP_HAVE_MSC_CPUID 56 #elif _MSC_VER > 1310 57 #include <intrin.h> 58 #define GetCPUInfo __cpuid 59 #define WEBP_HAVE_MSC_CPUID 60 #endif 61 62 #endif 63 64 // NaCl has no support for xgetbv or the raw opcode. 65 #if !defined(__native_client__) && (defined(__i386__) || defined(__x86_64__)) 66 static WEBP_INLINE uint64_t xgetbv(void) { 67 const uint32_t ecx = 0; 68 uint32_t eax, edx; 69 // Use the raw opcode for xgetbv for compatibility with older toolchains. 70 __asm__ volatile ( 71 ".byte 0x0f, 0x01, 0xd0\n" 72 : "=a"(eax), "=d"(edx) : "c" (ecx)); 73 return ((uint64_t)edx << 32) | eax; 74 } 75 #elif (defined(_M_X64) || defined(_M_IX86)) && \ 76 defined(_MSC_FULL_VER) && _MSC_FULL_VER >= 160040219 // >= VS2010 SP1 77 #include <immintrin.h> 78 #define xgetbv() _xgetbv(0) 79 #elif defined(_MSC_VER) && defined(_M_IX86) 80 static WEBP_INLINE uint64_t xgetbv(void) { 81 uint32_t eax_, edx_; 82 __asm { 83 xor ecx, ecx // ecx = 0 84 // Use the raw opcode for xgetbv for compatibility with older toolchains. 85 __asm _emit 0x0f __asm _emit 0x01 __asm _emit 0xd0 86 mov eax_, eax 87 mov edx_, edx 88 } 89 return ((uint64_t)edx_ << 32) | eax_; 90 } 91 #else 92 #define xgetbv() 0U // no AVX for older x64 or unrecognized toolchains. 93 #endif 94 95 #if defined(__i386__) || defined(__x86_64__) || defined(WEBP_HAVE_MSC_CPUID) 96 97 // helper function for run-time detection of slow SSSE3 platforms 98 static int CheckSlowModel(int info) { 99 // Table listing display models with longer latencies for the bsr instruction 100 // (ie 2 cycles vs 10/16 cycles) and some SSSE3 instructions like pshufb. 101 // Refer to Intel 64 and IA-32 Architectures Optimization Reference Manual. 102 static const uint8_t kSlowModels[] = { 103 0x37, 0x4a, 0x4d, // Silvermont Microarchitecture 104 0x1c, 0x26, 0x27 // Atom Microarchitecture 105 }; 106 const uint32_t model = ((info & 0xf0000) >> 12) | ((info >> 4) & 0xf); 107 const uint32_t family = (info >> 8) & 0xf; 108 if (family == 0x06) { 109 size_t i; 110 for (i = 0; i < sizeof(kSlowModels) / sizeof(kSlowModels[0]); ++i) { 111 if (model == kSlowModels[i]) return 1; 112 } 113 } 114 return 0; 115 } 116 117 static int x86CPUInfo(CPUFeature feature) { 118 int max_cpuid_value; 119 int cpu_info[4]; 120 int is_intel = 0; 121 122 // get the highest feature value cpuid supports 123 GetCPUInfo(cpu_info, 0); 124 max_cpuid_value = cpu_info[0]; 125 if (max_cpuid_value < 1) { 126 return 0; 127 } else { 128 const int VENDOR_ID_INTEL_EBX = 0x756e6547; // uneG 129 const int VENDOR_ID_INTEL_EDX = 0x49656e69; // Ieni 130 const int VENDOR_ID_INTEL_ECX = 0x6c65746e; // letn 131 is_intel = (cpu_info[1] == VENDOR_ID_INTEL_EBX && 132 cpu_info[2] == VENDOR_ID_INTEL_ECX && 133 cpu_info[3] == VENDOR_ID_INTEL_EDX); // genuine Intel? 134 } 135 136 GetCPUInfo(cpu_info, 1); 137 if (feature == kSSE2) { 138 return !!(cpu_info[3] & (1 << 26)); 139 } 140 if (feature == kSSE3) { 141 return !!(cpu_info[2] & (1 << 0)); 142 } 143 if (feature == kSlowSSSE3) { 144 if (is_intel && (cpu_info[2] & (1 << 9))) { // SSSE3? 145 return CheckSlowModel(cpu_info[0]); 146 } 147 return 0; 148 } 149 150 if (feature == kSSE4_1) { 151 return !!(cpu_info[2] & (1 << 19)); 152 } 153 if (feature == kAVX) { 154 // bits 27 (OSXSAVE) & 28 (256-bit AVX) 155 if ((cpu_info[2] & 0x18000000) == 0x18000000) { 156 // XMM state and YMM state enabled by the OS. 157 return (xgetbv() & 0x6) == 0x6; 158 } 159 } 160 if (feature == kAVX2) { 161 if (x86CPUInfo(kAVX) && max_cpuid_value >= 7) { 162 GetCPUInfo(cpu_info, 7); 163 return !!(cpu_info[1] & (1 << 5)); 164 } 165 } 166 return 0; 167 } 168 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 169 VP8CPUInfo VP8GetCPUInfo = x86CPUInfo; 170 #elif defined(WEBP_ANDROID_NEON) // NB: needs to be before generic NEON test. 171 static int AndroidCPUInfo(CPUFeature feature) { 172 const AndroidCpuFamily cpu_family = android_getCpuFamily(); 173 const uint64_t cpu_features = android_getCpuFeatures(); 174 if (feature == kNEON) { 175 return cpu_family == ANDROID_CPU_FAMILY_ARM && 176 (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0; 177 } 178 return 0; 179 } 180 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 181 VP8CPUInfo VP8GetCPUInfo = AndroidCPUInfo; 182 #elif defined(EMSCRIPTEN) // also needs to be before generic NEON test 183 // Use compile flags as an indicator of SIMD support instead of a runtime check. 184 static int wasmCPUInfo(CPUFeature feature) { 185 switch (feature) { 186 #ifdef WEBP_HAVE_SSE2 187 case kSSE2: 188 return 1; 189 #endif 190 #ifdef WEBP_HAVE_SSE41 191 case kSSE3: 192 case kSlowSSSE3: 193 case kSSE4_1: 194 return 1; 195 #endif 196 #ifdef WEBP_HAVE_NEON 197 case kNEON: 198 return 1; 199 #endif 200 default: 201 break; 202 } 203 return 0; 204 } 205 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 206 VP8CPUInfo VP8GetCPUInfo = wasmCPUInfo; 207 #elif defined(WEBP_HAVE_NEON) 208 // In most cases this function doesn't check for NEON support (it's assumed by 209 // the configuration), but enables turning off NEON at runtime, for testing 210 // purposes, by setting VP8GetCPUInfo = NULL. 211 static int armCPUInfo(CPUFeature feature) { 212 if (feature != kNEON) return 0; 213 #if defined(__linux__) && defined(WEBP_HAVE_NEON_RTCD) 214 { 215 int has_neon = 0; 216 char line[200]; 217 FILE* const cpuinfo = fopen("/proc/cpuinfo", "r"); 218 if (cpuinfo == NULL) return 0; 219 while (fgets(line, sizeof(line), cpuinfo)) { 220 if (!strncmp(line, "Features", 8)) { 221 if (strstr(line, " neon ") != NULL) { 222 has_neon = 1; 223 break; 224 } 225 } 226 } 227 fclose(cpuinfo); 228 return has_neon; 229 } 230 #else 231 return 1; 232 #endif 233 } 234 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 235 VP8CPUInfo VP8GetCPUInfo = armCPUInfo; 236 #elif defined(WEBP_USE_MIPS32) || defined(WEBP_USE_MIPS_DSP_R2) || \ 237 defined(WEBP_USE_MSA) 238 static int mipsCPUInfo(CPUFeature feature) { 239 if ((feature == kMIPS32) || (feature == kMIPSdspR2) || (feature == kMSA)) { 240 return 1; 241 } else { 242 return 0; 243 } 244 245 } 246 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 247 VP8CPUInfo VP8GetCPUInfo = mipsCPUInfo; 248 #else 249 WEBP_EXTERN VP8CPUInfo VP8GetCPUInfo; 250 VP8CPUInfo VP8GetCPUInfo = NULL; 251 #endif