asmjit_test_instinfo.cpp (6769B)
1 // This file is part of AsmJit project <https://asmjit.com> 2 // 3 // See <asmjit/core.h> or LICENSE.md for license and copyright information 4 // SPDX-License-Identifier: Zlib 5 6 #include <asmjit/core.h> 7 8 #if !defined(ASMJIT_NO_X86) 9 #include <asmjit/x86.h> 10 #endif 11 12 #include <stdio.h> 13 14 #include "../commons/asmjitutils.h" 15 16 using namespace asmjit; 17 18 static void print_app_info() noexcept { 19 printf("AsmJit Instruction Info Test Suite v%u.%u.%u [Arch=%s] [Mode=%s]\n\n", 20 unsigned((ASMJIT_LIBRARY_VERSION >> 16) ), 21 unsigned((ASMJIT_LIBRARY_VERSION >> 8) & 0xFF), 22 unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF), 23 asmjit_arch_as_string(Arch::kHost), 24 asmjit_build_type() 25 ); 26 } 27 28 namespace { 29 30 #if !defined(ASMJIT_NO_X86) 31 static char access_letter(bool r, bool w) noexcept { 32 return r && w ? 'X' : r ? 'R' : w ? 'W' : '_'; 33 } 34 35 static void print_info(Arch arch, const BaseInst& inst, const Operand_* operands, size_t op_count) { 36 StringTmp<512> sb; 37 38 // Read & Write Information 39 // ------------------------ 40 41 InstRWInfo rw; 42 InstAPI::query_rw_info(arch, inst, operands, op_count, &rw); 43 44 #ifndef ASMJIT_NO_LOGGING 45 Formatter::format_instruction(sb, FormatFlags::kNone, nullptr, arch, inst, Span(operands, op_count)); 46 #else 47 sb.append("<Logging-Not-Available>"); 48 #endif 49 sb.append("\n"); 50 51 sb.append(" Operands:\n"); 52 for (uint32_t i = 0; i < rw.op_count(); i++) { 53 const OpRWInfo& op = rw.operand(i); 54 55 sb.append_format(" [%u] Op=%c Read=%016llX Write=%016llX Extend=%016llX", 56 i, 57 access_letter(op.is_read(), op.is_write()), 58 op.read_byte_mask(), 59 op.write_byte_mask(), 60 op.extend_byte_mask()); 61 62 if (op.is_mem_base_used()) { 63 sb.append_format(" Base=%c", access_letter(op.is_mem_base_read(), op.is_mem_base_write())); 64 if (op.is_mem_base_pre_modify()) 65 sb.append_format(" <PRE>"); 66 if (op.is_mem_base_post_modify()) 67 sb.append_format(" <POST>"); 68 } 69 70 if (op.is_mem_index_used()) { 71 sb.append_format(" Index=%c", access_letter(op.is_mem_index_read(), op.is_mem_index_write())); 72 } 73 74 sb.append("\n"); 75 } 76 77 // CPU Flags (Read/Write) 78 // ---------------------- 79 80 if ((rw.read_flags() | rw.write_flags()) != CpuRWFlags::kNone) { 81 sb.append(" Flags: \n"); 82 83 struct FlagMap { 84 CpuRWFlags flag; 85 char name[4]; 86 }; 87 88 static const FlagMap flag_map_table[] = { 89 { CpuRWFlags::kX86_CF, "CF" }, 90 { CpuRWFlags::kX86_OF, "OF" }, 91 { CpuRWFlags::kX86_SF, "SF" }, 92 { CpuRWFlags::kX86_ZF, "ZF" }, 93 { CpuRWFlags::kX86_AF, "AF" }, 94 { CpuRWFlags::kX86_PF, "PF" }, 95 { CpuRWFlags::kX86_DF, "DF" }, 96 { CpuRWFlags::kX86_IF, "IF" }, 97 { CpuRWFlags::kX86_AC, "AC" }, 98 { CpuRWFlags::kX86_C0, "C0" }, 99 { CpuRWFlags::kX86_C1, "C1" }, 100 { CpuRWFlags::kX86_C2, "C2" }, 101 { CpuRWFlags::kX86_C3, "C3" } 102 }; 103 104 sb.append(" "); 105 for (uint32_t f = 0; f < 13; f++) { 106 char c = access_letter((rw.read_flags() & flag_map_table[f].flag) != CpuRWFlags::kNone, 107 (rw.write_flags() & flag_map_table[f].flag) != CpuRWFlags::kNone); 108 if (c != '_') 109 sb.append_format("%s=%c ", flag_map_table[f].name, c); 110 } 111 112 sb.append("\n"); 113 } 114 115 // CPU Features 116 // ------------ 117 118 CpuFeatures features; 119 InstAPI::query_features(arch, inst, operands, op_count, &features); 120 121 #ifndef ASMJIT_NO_LOGGING 122 if (!features.is_empty()) { 123 sb.append(" Features:\n"); 124 sb.append(" "); 125 126 bool first = true; 127 CpuFeatures::Iterator it(features.iterator()); 128 while (it.has_next()) { 129 uint32_t feature_id = uint32_t(it.next()); 130 if (!first) 131 sb.append(" & "); 132 Formatter::format_feature(sb, arch, feature_id); 133 first = false; 134 } 135 sb.append("\n"); 136 } 137 #endif 138 139 printf("%s\n", sb.data()); 140 } 141 142 template<typename... Args> 143 static void print_info_simple(Arch arch,InstId inst_id, InstOptions options, Args&&... args) { 144 BaseInst inst(inst_id); 145 inst.add_options(options); 146 Operand_ op_array[] = { std::forward<Args>(args)... }; 147 print_info(arch, inst, op_array, sizeof...(args)); 148 } 149 150 template<typename... Args> 151 static void print_info_extra(Arch arch, InstId inst_id, InstOptions options, const Reg& extra_reg, Args&&... args) { 152 BaseInst inst(inst_id); 153 inst.add_options(options); 154 inst.set_extra_reg(extra_reg); 155 Operand_ op_array[] = { std::forward<Args>(args)... }; 156 print_info(arch, inst, op_array, sizeof...(args)); 157 } 158 #endif // !ASMJIT_NO_X86 159 160 static void test_x86_arch() { 161 #if !defined(ASMJIT_NO_X86) 162 using namespace x86; 163 Arch arch = Arch::kX64; 164 165 print_info_simple(arch, Inst::kIdAdd, InstOptions::kNone, eax, ebx); 166 print_info_simple(arch, Inst::kIdXor, InstOptions::kNone, eax, eax); 167 print_info_simple(arch, Inst::kIdLods, InstOptions::kNone, eax, dword_ptr(rsi)); 168 169 print_info_simple(arch, Inst::kIdPshufd, InstOptions::kNone, xmm0, xmm1, imm(0)); 170 print_info_simple(arch, Inst::kIdPabsb, InstOptions::kNone, mm1, mm2); 171 print_info_simple(arch, Inst::kIdPabsb, InstOptions::kNone, xmm1, xmm2); 172 print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, mm1, imm(0)); 173 print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, xmm1, imm(0)); 174 print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, ptr(rax), xmm1, imm(0)); 175 176 print_info_simple(arch, Inst::kIdVpdpbusd, InstOptions::kNone, xmm0, xmm1, xmm2); 177 print_info_simple(arch, Inst::kIdVpdpbusd, InstOptions::kX86_Vex, xmm0, xmm1, xmm2); 178 179 print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm1, ymm2); 180 print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm30, ymm31); 181 print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, zmm0, zmm1, zmm2); 182 183 print_info_simple(arch, Inst::kIdVpternlogd, InstOptions::kNone, zmm0, zmm0, zmm0, imm(0xFF)); 184 print_info_simple(arch, Inst::kIdVpternlogq, InstOptions::kNone, zmm0, zmm1, zmm2, imm(0x33)); 185 186 print_info_extra(arch, Inst::kIdVaddpd, InstOptions::kNone, k1, zmm0, zmm1, zmm2); 187 print_info_extra(arch, Inst::kIdVaddpd, InstOptions::kX86_ZMask, k1, zmm0, zmm1, zmm2); 188 189 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, xmm0, xmm1); 190 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, ymm0, xmm1); 191 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, zmm0, ymm1); 192 193 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, xmm0, ptr(rsi)); 194 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, ymm0, ptr(rsi)); 195 print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, zmm0, ptr(rsi)); 196 #endif // !ASMJIT_NO_X86 197 } 198 199 } // {anonymous} 200 201 int main() { 202 print_app_info(); 203 test_x86_arch(); 204 205 return 0; 206 }